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LatticeECP3 Family - Lowest Power.  Highest Value.  Innovative.

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 ECP3

The LatticeECP3 family, is the third generation high value FPGA from Lattice Semiconductor, which offers the industry's lowest power consumption and price of any SERDES-capable FPGA device. The LatticeECP3 FPGA family offers multi-protocol 3.2G SERDES with XAUI jitter compliance, DDR3 memory interfaces, powerful DSP capabilities, high density on-chip memory and up to 149K LUTS, all with half the power consumption and half the price of competitive SERDES-capable FPGAs. The entire LatticeECP3 family is manufactured using Fujitsu's advanced low power process technology.
 

Videos, Webcasts

ECP3 Low Power Video Image

Low Power Video
SMPTE VIdeo Image

SMPTE Video
ECP3 Video Image CPRI

CPRI Video
ECP3 RRH webcast

RRH Solution Webcast

 

Key Features

  • Lowest-Power FPGA with SERDES
    • Low Power process
    • Upto 80% lower static power, and 50% lower total power relative to the competition
    • Less than 110mW per SERDES channel @ 3.2 Gbps
  • Optimized FPGA Architecture
    • 4-input look-up table (LUT) fabric
    • Logic densities from 17K to 149K LUTs
    • Upto 6.8Mbits of Embedded Block RAM (EBR)
    • 2 DLLs per device, 2 to 10 PLLs per device
  • Cascadable sysDSP™ With ALU
    • Multiply, accumulate, addition and subtraction
    • High performance Adder Trees and MMAC functionality
    • 54-bit cascadable arithmetic logic unit
    • 24 to 320 multipliers (18x18)
  • Advanced Configuration Options
    • Parallel burst mode for SPI Flash
    • Dual-boot images supported
    • On chip 128 bit AES decryption
    • Live update with TransFR™ Technology
  • High Speed Embedded SERDES
    • Up to 16 channels @ 3.2Gbps
    • Data rates from 150Mbps to 3.2Gbps
    • IEEE802.3-2002 XAUI Jitter Compliant
    • Mixed Protocol and Mixed Rate support
    • Supports PCI Express, Ethernet (GbE, XAUI, & SGMII), SMPTE, Serial Rapid I/O, CPRI and OBSAI
  • Flexible sysIO™ Buffers
    • LVCMOS 33/25/18/15/12 & LVTTL
    • PCI and Differential HSTL, SSTL
    • SSTL 33/25/18/15 I, II & HSTL15 I and HSTL18 I, II
    • LVDS, Bus-LVDS, LVPECL, RSDS, MLVDS
    • 800 Mbps DDR3, 1 Gbps LVDS
  • Wide Range of Package and User I/O Options
    • Up to 586 user I/O pins
    • Low cost wirebond fpBGA packages
    • Pb-free / RoHS-compliant

 

Development Kits & Evaluation Boards

In order to accelerate your design development, Lattice offers a choice of development kits & boards to support LatticeECP3 designs. The development kits & boards enable you to evaluate the benefits of the LatticeECP3 devices capabilities in a lab setting.

  • The LatticeECP3 PCI Express Development Kit offers a complete hardware/software development environment to evaluate PCI Express technology and accelerate design and development using the LatticeECP3.  The kit includes
    • LatticeECP3 PCI Express x1/x4 Solutions Board
    • USB download cable
    • Demo CDs for Windows and Linux
    • ispLEVER with a 60-day license (Windows or Linux)
 ECP3 PCI Express Dev Kit
ECP3 - Serial protocol board - DDR3 - 1500 - Thumb
ECP3 - IO Protocol w/ ADC-DAC Card - 200
ECP3 - Video Protocol Board - Thumb
Tachyssema PF120 HV3 module - thumb

 

Demos

 

Design Solutions

 

Device Selection Guide

LatticeECP3 Selection Guide
Device ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
LUTs (K) 17 33 67 92 149
EBR SRAM (Kbits) 700 1327 4420 4420 6850
EBR SRAM Blocks 38 72 240 240 372
Distributed RAM (Kbits) 36 68 145 188 303
18x18 Multipliers 24 64 128 128 320
3.2Gbps SERDES Channels 4 4 12 12 16
Maximum Available I/O 222 310 490 490 586
PLLs + DLLs 2+2 4+2 10+2 10+2 10+2
Packages SERDES I/O Combinations
256-ball ftBGA (17 x 17 mm) 4 / 133 4 / 133Buy      
484-ball fpBGA (23 x 23 mm) 4 / 222 4 / 295Buy 4 / 295Buy 4 / 295Buy  
672-ball fpBGA (27 x 27 mm)   4 / 310Buy 8 / 380Buy 8 / 380Buy 8 / 380Buy
1156-ball fpBGA (35 x 35 mm)     12 / 490Buy 12 / 490Buy 16 / 586Buy